[SOLVED] best cpu performance

[Elleni]

Hi, I understand that setting host in cpu type has its limitations esp. when using different hardware, but as long as the hardware has a minimum standard it could make sense to get most performance out of the guests.

I stumbled across this a an employe requested avx2 support because of mongodb not running. I quickly found this thread and did the same, that lead to the question, if guests could run even quicker/better by enabling most or some of the instruction sets currently not acive. Default is x86-64-v2-AES.

Following the lscpu of my hosts. Is there another preset - "better" then x86-64-v2-AES that could fit my cpu and squezing even more performance out of it, or are there also drawbacks other then compatibility issues why some of the instrutionsets are not exposed by the presets?

lscpu
Architecture:                x86_64
  CPU op-mode(s):            32-bit, 64-bit
  Address sizes:             46 bits physical, 48 bits virtual
  Byte Order:                Little Endian
CPU(s):                      40
  On-line CPU(s) list:       0-39
Vendor ID:                   GenuineIntel
  Model name:                Intel(R) Xeon(R) CPU E5-2650 v3 @ 2.30GHz
    CPU family:              6
    Model:                   63
    Thread(s) per core:      2
    Core(s) per socket:      10
    Socket(s):               2
    Stepping:                2
    CPU(s) scaling MHz:      93%
    CPU max MHz:             3000.0000
    CPU min MHz:             1200.0000
    BogoMIPS:                4594.24
    Flags:                   fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm
                              pbe syscall nx pdpe1gb rdtscp lm constant_tsc arch_perfmon pebs bts rep_good nopl xtopology nonstop_tsc cpuid aper
                             fmperf pni pclmulqdq dtes64 monitor ds_cpl vmx smx est tm2 ssse3 sdbg fma cx16 xtpr pdcm pcid dca sse4_1 sse4_2 x2a
                             pic movbe popcnt tsc_deadline_timer aes xsave avx f16c rdrand lahf_lm abm cpuid_fault epb pti intel_ppin ssbd ibrs
                             ibpb stibp tpr_shadow flexpriority ept vpid ept_ad fsgsbase tsc_adjust bmi1 avx2 smep bmi2 erms invpcid cqm xsaveop
                             t cqm_llc cqm_occup_llc dtherm ida arat pln pts vnmi md_clear flush_l1d
Virtualization features:
  Virtualization:            VT-x
Caches (sum of all):
  L1d:                       640 KiB (20 instances)
  L1i:                       640 KiB (20 instances)
  L2:                        5 MiB (20 instances)
  L3:                        50 MiB (2 instances)
NUMA:
  NUMA node(s):              2
  NUMA node0 CPU(s):         0-9,20-29
  NUMA node1 CPU(s):         10-19,30-39
Vulnerabilities:
  Gather data sampling:      Not affected
  Ghostwrite:                Not affected
  Indirect target selection: Not affected
  Itlb multihit:             KVM: Mitigation: Split huge pages
  L1tf:                      Mitigation; PTE Inversion; VMX conditional cache flushes, SMT vulnerable
  Mds:                       Mitigation; Clear CPU buffers; SMT vulnerable
  Meltdown:                  Mitigation; PTI
  Mmio stale data:           Mitigation; Clear CPU buffers; SMT vulnerable
  Reg file data sampling:    Not affected
  Retbleed:                  Not affected
  Spec rstack overflow:      Not affected
  Spec store bypass:         Mitigation; Speculative Store Bypass disabled via prctl
  Spectre v1:                Mitigation; usercopy/swapgs barriers and __user pointer sanitization
  Spectre v2:                Mitigation; Retpolines; IBPB conditional; IBRS_FW; STIBP conditional; RSB filling; PBRSB-eIBRS Not affected; BHI No
                             t affected
  Srbds:                     Not affected
  Tsx async abort:           Not affected
  Vmscape:                   Mitigation; IBPB before exit to userspace

 

[fba]

Hi,

why not choose any of the higher versions? They expose AVX2.

x86-64-v3 exposes these flags compared to x86-64-v2-AES:

• +avx, +avx2, +bmi1, +bmi2, +f16c, +fma, +movbe, +xsave

x86-64-v4 exposes these additional flags compared to x86-64-v3:

• +avx512f, +avx512bw, +avx512cd, +avx512dq, +avx512vl

source: https://pve.proxmox.com/pve-docs/chapter-qm.html#_qemu_cpu_types

 

[Elleni]

Hello and thanks for posting - thats indeed what I asked myself too but thought, would be better to first ask and learn what would be the best way to optimize performance while not running into probs. Esp. the v3 ones seem all supported, but what about the not mentioned -AES in the name? The v4 I dont see in my lscpu, but I'll read and try to understand the link you posted, thanks!